The present invention relates to the field of displaying images and data. More specifically, the present invention relates to the field of ultra-high resolution displays.
Currently, there is a wide variety of devices and techniques utilized to visually display analog and/or digital signals containing moving images, data, and the like, thereby enabling people to view this information. Many of these display devices are very familiar to the general public. For instance, moving images and data are visually displayed on television sets, computer monitors, and arcade video games, to name a few. It should be appreciated that there are many different technologies which are utilized to implement these type of display devices. Some of these technologies include a cathode ray tube (CRT), a liquid crystal display (LCD), a laser based system, a reflective LCD, and a plasma display.
Furthermore, there are other types of monitors and display devices that display moving images and data which have exceptionally high bandwidth requirements compared to typical monitors. These types of monitors usually display ultra-high resolution images. But there are problems associated with implementing these type of monitors. One of the main problems is providing an exceptionally high bandwidth interface between one or more image generators and a ultra-high resolution display. One prior art solution for providing a high bandwidth interface is to design and build a point solution interface for a specific bandwidth (e.g., 3.6 gigabytes/sec). In other words, design and build a particular interface which operates with a specific scanning architecture of a ultra-high resolution display. It should be appreciated that there are several disadvantages to this prior art point solution interface.
One of the main disadvantages of this prior art point solution interface is that it is very expensive. For instance, since the scanning architectures at these ultra-high resolutions are very complicated, there is a lot of overhead in designing and building an interface specifically for an ultra-high resolution monitor. Furthermore, for every different type of ultra-high resolution scanning architecture, a new interface has to be designed and built basically from scratch. As such, this prior art interface solution is not very cost efficient because it does not provide any type of interface standardization. Another disadvantage of the above mentioned prior art interface solution is that the resulting interface is specifically limited to its designed operating bandwidth (e.g., 3.6 GB/sec). Therefore, if there is a need for an interface having a larger operating bandwidth (e.g., 4.0 GB/sec), the existing interface does not satisfy this desired operating bandwidth. As such, a new interface has to be designed and built, as described above.
Another disadvantage of the prior art point solution interface described above is that it would typically need an extremely large amount of wires and there would be the concern of skewing all of the wires appropriately. Moreover, the large amount of wires results in a very thick cable that would be very expensive and would also lose desirable flexibility.
Another prior art solution for providing an exceptionally high bandwidth interface is to use multiple smaller interfaces to couple an image generator to an ultra-high resolution display. One of the ways to implement multiple interfaces is to break up image data into a grid of multiple regions of equal size, as shown in FIG. 1. But there are disadvantages associated with this prior art interface grid solution. One of the main disadvantages is that the scanning architecture of an ultra-high resolution monitor needs to be built specifically to operate, in the manner of the interfaces. As such, the existing interfaces can only be use for a specific type of scanning architecture.
Another disadvantage associated with the prior art interface grid solution is that the regions located below a horizontal seam are not temporally aligned with the regions located above the horizontal seam. As such, there is a need to buffer an entire frame of data of an ultra-high resolution image. This buffering results in two further disadvantages. The first disadvantage is that extra memory devices are needed in order to buffer the entire frame of data thereby resulting in higher costs, additional heat, and utilizing more board space. The other disadvantage of buffering the entire frame of data is that it adds another frame of latency to the ultra-high resolution display. An additional frame of latency is specifically problematic for visual simulation, which is a driving force behind ultra-high resolution displays. Specifically, visual simulation is an active feedback system. As such, it is important that a visual simulation system visually react to any received input signals (e.g., from a joystick) in a short amount of time (e.g., less than 50 milliseconds). Otherwise, the images displayed by the visual simulator appear unrealistic to a viewer. Therefore, the addition of another frame of latency can slow down the reaction of the visual simulator thereby causing the visual simulation experience to be unrealistic.
Another prior art way to implement multiple small interfaces to couple an image generator to an ultra-high resolution display is to have each interface only deal with a single pixel column of image data, as shown in FIG. 2. In other words, if there were 16 interfaces, one interface would deal with a first single pixel column of image data while a second interface would deal with a second single pixel column of image data and so forth. Therefore, the 16 interfaces would transmit 16 pixels in parallel to the ultra-high resolution display. But there are disadvantages associated with this prior art single pixel column interface solution. One of the main disadvantages is that it lacks the ability to run things in a parallel fashion. For example, 20 million pixels at 60 Hertz is a lot of data to move and one graphics card may not have enough rendering bandwidth, to generate images that large in real-time. As such, multiple image generators can be used to generate this much data. The problem is that custom hardware has to be created to match the kind of pixel interleaving that needs to be supported, resulting in very expensive overhead in designing the system. Furthermore, this prior art solution exhibits some of the same disadvantages as the prior art point solution interface, described above.
Accordingly, a need exists for a method and system for providing an exceptionally high bandwidth interface between an image generator and an ultra-high resolution display which requires huge volumes of data. A further need exists for a method and system which meets the above need but is not very expensive. Still another need exists for a method and system which meets the above need and provides a standard for an exceptionally high bandwidth interface. Yet another need exists for a method and system which meets the above need and is not specifically limited to one operating bandwidth. A further need exists for a method and system which meets the above need and which does not require a large amount of wires. Still another need exists for a method and system which meets the above need and which does not have to be used with only one specific type of scanning architecture. A need also exists for a method and system which meets the above need and produces an image that is temporally aligned. Another need exists for a method and system which meets the above need but which does not require buffering an entire frame of data of an ultra-high resolution image. Yet another need exists for a method and system which meets the above need and which does not add another frame of latency. A further need exists for a method and system which meets the above need and has the ability to run things in a parallel fashion.
The present invention provides a method and system for providing an exceptionally high bandwidth interface between an image generator and an ultra-high resolution display which requires huge volumes of data. The basic idea of the present invention is to subdivide an ultra-high resolution display screen into narrow strips or column subsections, thereby enabling the mapping of multiple pixel interfaces to it. In this manner, the full pixel display is completely mapped. As such, multiple image generators are able to create in parallel their specific narrow strip of the full pixel display using view frustum culling, which is known by those of ordinary skill in the art.
It should be appreciated that an interface in accordance with the present invention is not tied tightly to a scanning architecture. As such, this keeps a level of abstraction between the image generator and the many different types of display devices. Furthermore, since this interface is by design a rasterization interface, more image generators and less expensive image generators can be used for driving the display device. Moreover, by abstracting the interface, it necessitates a line buffer within the display device, thereby removing the need for transferring the pixel data in actual real-time.
Specifically, one embodiment of the present invention includes a method for moving information associated with a high bandwidth display image over a plurality of cables. The method comprises the step of rendering pixels of an image. Furthermore, the method also includes the step of storing pixel data of the image within a memory device. Another step of the method includes dividing the pixel data of the image into a plurality of strips. Additionally, the method includes the step of outputting in parallel the pixel data of the plurality of strips of the image over the plurality of cables coupled to a display device.
In another embodiment, the present invention includes the steps of the above described embodiment and further includes the steps of: executing an application program on a host processor which issues graphics commands; processing vertices by a geometry circuit coupled to the host processor; and generating the pixel data through a rasterizer coupled to the geometry circuit.
In still another embodiment, the present invention includes a system for moving information associated with a high bandwidth display image over a plurality of cables. The system includes a host processor having an application program issuing graphics commands. Furthermore, the system includes a geometry circuit coupled to the host processor for processing primitives of an image. The system also includes a rasterizer coupled to the geometry circuit for generating pixel data of the image. Additionally, the system includes a memory device coupled to the rasterizer which stores the pixel data of the image. Moreover, the system includes a display interface coupled to the rasterizer to divide the pixel data of the image into a plurality of strips. Furthermore, the display interface is coupled to output in parallel the pixel data of the plurality of strips of the image over the plurality of cables coupled to a display device.
In another embodiment, the present invention includes the features of the above described embodiment and further recites that the display device performs a plurality of raster scanning sequences in parallel to display the pixel data of the plurality of strips of the image.
These and other advantages of the present invention will no doubt become obvious to those of ordinary skill in the art after having read the following detailed description of the preferred embodiments which are illustrated in the drawing figures.